Introduction

Spacecraft electronics are continuously exposed to energetic particles originating from:

• the Earth’s radiation belts,
• solar particle events,
• galactic cosmic rays.

These particles interact with semiconductor devices and cause:

• Cumulative degradation over time &
• Instantaneous faults during operation.

Both effects must be considered when designing onboard computers.

With the rapid growth of the commercial space sector, there is a clear industry shift toward the use of commercial off-the-shelf (COTS) components, driven by long procurement lead times, limited availability, and high cost of traditional radiation-hardened parts. To remain competitive and responsive to mission schedules, manufacturers must therefore adopt radiation-tolerant-by-design (RTBD) methodologies that enable reliable operation using predominantly commercial integrated circuits. This approach requires rigorous radiation environment analysis, shielding assessment, and formal verification through radiation testing in order to quantify design margins and provide customers with objective, traceable evidence of system-level radiation robustness.

Total Ionizing Dose (TID)

TID represents the cumulative damage caused by ionizing radiation in semiconductor materials over the mission lifetime.

Effects include:

• threshold voltage shifts,
• increased leakage current,
• timing degradation,
• functional failure.

TID is measured in: rad (Si) or krad(Si)

Single Event Effects (SEE)

Single energetic particles can cause:

• bit flips (SEU),
• latch-up (SEL),
• functional interrupts (SEFI),
• destructive events (SEB/SEGR).

These are handled using architectural and design mitigation techniques and are treated separately from TID.

Radiation tolerance of COTS-based computers

 Computers with COTS components used either in EM, QM or FM are immune to radiation range of 10 to 30 krad. We have some design techniques to improve tolerance for COTS-based computers.

• Triple-modular redundancy

Its a fault-tolerant design technique in which three identical instances of a function operate in parallel, and their outputs are continuously compared using a majority-voting mechanism.

It is widely used in space electronics to mitigate SEE and to improve overall system reliability in radiation environments.

• Latch up protection

Latch-up protection systems detect abnormal current consumption and rapidly remove power from the affected device or rail. The protection cycle is: Monitor current on the power rail or device supply, detect over-current exceeding a predefined threshold, disconnect power within microseconds to milliseconds, allow cool-down, restore power & log the event.

Common implementation techniques are: Electronic current limiting, Power rail segmentation, Automatic power cycling, Dedicated latch-up protection ICs, Thermal protection

• ECC & EDAC

These are techniques used to protect digital memory and data paths from corruption caused by radiation-induced faults, particularly SEUs. The most common implementation in onboard computers are: Single Error Correction, Double Error Detection, Corrects 1-bit error, Detects 2-bit errors, Widely supported by space-grade MCUs, FPGAs, and memory controllers, Double Error Correction, BCH codes & Reed–Solomon (for mass memory).

• Screening
• Thermal margining
• Over design
• Using Rad. tol. ICs for critical components

For each OBC, as part of system engineering at sub-system level, we carry out FMEA to recognize critical components and list critical items. Usually DC-DC & Storages are critical components in COTS-based OBCs as FPGAs have tolerant design by manufacturers.

Final cost would be between COTS & Rad. tol. Component but effectively improve sub-system reliability.

As a manufacturer, we provide a comprehensive radiation analysis report as part of our subsystem engineering process. This includes an assessment of reliability versus cost, giving our clients a clear view of trade-offs and enabling informed decisions to optimize system reliability.