Modular PIC64 HPSC Single Board Computer Platform for Next Generation Satellite Payload Processing
- January 27, 2026
- CAVU Aerospace UK
Modern satellite missions increasingly demand on‑board processing capabilities that go far beyond traditional command and data handling. High‑resolution Earth observation, synthetic aperture radar, software‑defined payloads, inter‑satellite networking, and AI‑assisted edge analytics all require substantial compute performance, high‑bandwidth memory subsystems, and deterministic, high‑speed data movement within the spacecraft.
To address these needs, OBC‑64 is developed as a modular and scalable single‑board computer (SBC) platform based on Microchip’s next‑generation PIC64‑HPSC (High‑Performance Spaceflight Computer) architecture. As a Microchip design partner, CAVU has focused on creating a flexible system that can be tailored to a wide range of mission classes—from small satellites to complex distributed payload processing architectures—while maintaining space‑grade reliability and long‑term availability.
SBC Scope and Architecture
The OBC‑64 platform is designed as a general‑purpose high‑performance space SBC optimized for:
- Payload data processing
- High‑speed networking and packet handling
- Distributed and federated on‑board computing
- Edge compute workloads including AI/ML inference
- Deterministic control and spacecraft management tasks
Rather than targeting a single fixed configuration, OBC‑64 follows a modular and scalable architecture. This allows system integrators to select processor variants, memory capacity, interfaces, and redundancy levels according to mission requirements, power budgets, and reliability targets.
At the core of the design is the PIC64‑HPSC family, coupled with a high‑bandwidth memory subsystem and a rich set of high‑speed and legacy spacecraft interfaces.
PIC64‑HPSC Processor Options
OBC‑64 supports multiple members of Microchip’s PIC64‑HPSC processor family:
Supported Variants
- PIC64‑HPSC1000
- PIC64‑HPSC1100
These devices provide multi‑core 64‑bit processing, integrated high‑speed I/O, and hardware features designed specifically for space applications, including radiation tolerance and long‑term availability.
Configurable Architecture
For each mission, the following parameters can be adapted:
- Number of enabled cores
- Clock frequency profiles
- Memory channel population
- High‑speed interface population (PCIe, Ethernet, SpaceWire, etc.)
- Redundancy and fault‑tolerance strategy
This flexibility allows OBC‑64 to function equally well as:
- A centralized payload computer
- A network processing node
- A companion processor for sensor front‑ends
- A distributed compute element within a multi‑board cluster
Main Memory Subsystem
High‑performance on‑board processing requires not only CPU capability, but also sustained memory bandwidth and reliability. OBC‑64 therefore provides multiple memory architecture options, all with built‑in error detection and correction.
Version A – Single DDR4 Interface
- 80‑bit wide DDR4 interface
- 64‑bit data + 16‑bit ECC
- Capacity: up to 80 GB
- Optimized for:
- Moderate‑to‑high processing workloads
- Lower power consumption
- Reduced board complexity
Version B – Dual DDR4 Interfaces
- Two independent DDR4 channels
- ECC on both interfaces
- Higher aggregate bandwidth
- Increased maximum memory capacity
- Suitable for:
- High‑throughput payload processing
- AI/ML workloads
- Multi‑application consolidation
- Software‑defined payloads
Non‑Volatile Memory Architecture
To support mission software storage, payload data buffering, and fault‑tolerant boot mechanisms, OBC‑64 integrates a comprehensive set of non‑volatile memory options.
Parallel MRAM
- Radiation‑tolerant
- Fast write performance
- Used for:
- Boot images
- Critical configuration data
- System state preservation
High‑Capacity NAND Flash
- Primary mass‑storage medium
- Suitable for:
- Payload data buffering
- File systems
- Application storage
Additional Serial Memories (Configurable)
Depending on mission redundancy and reliability requirements, additional devices can be populated:
- QSPI NOR Flash
- FRAM
- Other serial NVM technologies
This layered approach allows system designers to balance endurance, performance, radiation tolerance, and cost.
High‑Speed and Mission Interfaces
A defining feature of OBC‑64 is its rich connectivity, enabling both traditional spacecraft buses and modern high‑performance networking.
PCI Express Gen3
- High‑bandwidth expansion interface
- Used for:
- Companion compute accelerators
- High‑speed storage cards
- Custom payload interfaces
Multi‑Port Ethernet with TSN
- Deterministic Ethernet support via Time‑Sensitive Networking (TSN)
- Enables:
- Real‑time data flows
- Synchronized distributed processing
- Network‑centric spacecraft architectures
RoCEv2 (RDMA over Converged Ethernet)
- Ultra‑low latency, high‑throughput communication
- Enables:
- Chip‑to‑chip interconnect
- Board‑to‑board compute clustering
- Parallel operation of multiple OBC‑64 SBCs
This capability allows several SBCs to behave as a single logical processing system, distributing workloads across multiple nodes.
SpaceWire
- Multiple ports via integrated router
- Supports:
- Legacy payload interfaces
- Instrument control
- Spacecraft avionics networks
Standard Control Interfaces
- SPI
- I²C
- UART
- GPIO
- JTAG
These interfaces support housekeeping, peripheral control, debugging, and system bring‑up.
System‑Level Expansion and Companion Boards
Rather than concentrating all functions onto a single large board, CAVU has adopted a modular system philosophy. The OBC‑64 SBC acts as the compute core within a wider ecosystem of mission‑specific expansion boards.
Companion Card Types
The platform roadmap includes:
- Ethernet and advanced networking cards
For additional ports, switching, and network topologies. - High‑speed ADC and DAC cards
Supporting software‑defined radios, radar payloads, and sensor front‑ends. - High‑capacity storage cards
For extended mission data buffering and payload recording. - Power distribution and conditioning cards
Providing regulated rails, monitoring, and fault protection.
Backplane Architecture
Custom backplane boards support:
- Multiple card counts
- Star, ring, or mesh topologies
- High‑speed serial fabrics
- Redundant power and data paths
This approach enables complete on‑board computing subsystems to be assembled from standardized building blocks, reducing development time while increasing design flexibility.
Typical Application Scenarios
OBC‑64 is suitable for a wide range of space missions, including:
- Earth observation satellites with real‑time image processing
- Synthetic aperture radar payload controllers
- Software‑defined communication payloads
- Inter‑satellite routing nodes
- AI‑enabled anomaly detection and data reduction
- Distributed multi‑computer spacecraft architectures
By combining space‑grade reliability with modern data‑center‑class networking concepts such as RoCEv2 and TSN‑enabled Ethernet, OBC‑64 bridges the gap between traditional spacecraft avionics and high‑performance distributed computing—opening the door to more autonomous, capable, and efficient satellites.
