CAVU Aerospace UK

Peripheral boards on OnBoard Computers for ADCs & DACs

Usually from mission’s description on sensor readout and control systems, project developers are looking for an instrumentation-type ADC/DAC system rather than an RF/SDR digitizer. The design priorities for these two classes are quite different, so it would help to clarify a few parameters before proposing the right Peripheral boards:

 

Typical differences between the two approaches:

Parameter

Instrumentation ADC/DAC (control & sensors)

SDR / RF ADC/DAC

Resolution

Usually 16–24 bit (precision)

Typically, 12–16 bit

Sampling rate

kSPS to a few MSPS

10 MSPS to GSPS

Channel count

Often many channels (e.g., 8–32)

Usually 1–4 channels

Sampling type

Often simultaneous or multiplexed precision

High-speed streaming

Input range

Defined voltage ranges (e.g. ±10 V, 0–5 V, ±2.5 V)

Small RF/full-scale differential (~1 Vpp)

Signal type

Single-ended or differential, conditioned sensors

High-speed differential RF inputs

Noise / accuracy

Focus on low noise, INL/DNL, precision

Focus on SFDR, bandwidth

Output type (DAC)

Precision voltage/current outputs

High-speed RF waveform outputs

 

OnBoard Computers, OBC, SBC, Single Board Computer, ADCs, DACs, ADC/DAC, RF/SDR

For a fast steering mirror control loop, systems typically prioritize:

  • Multiple simultaneous ADC channels for sensor readout
  • Multiple DAC outputs for actuator control
  • Deterministic timing / low latency
  • Defined voltage ranges (e.g., ±10 V or 0–5 V)

 

To recommend the right architecture, we usually need to know followings:

  1. Required sampling rate per channel (e.g., 10 kSPS, 100 kSPS, 1 MSPS, etc.)
  2. Resolution requirement (12-bit, 16-bit, 18-bit, etc.)
  3. Input signal range for ADCs (±10 V, ±5 V, 0–3.3 V, differential, etc.)
  4. DAC output range required for driving the mirrors
  5. Do the 8 ADC channels need simultaneous sampling, or is multiplexing acceptable?
  6. Any latency requirements for the control loop?
  7. Preferred interface location (direct FPGA processing or CPU/Linux side)?

 

System architecture can be fit into an Addon card on top of the OBC or integrated into an AL7075 enclosure box for more reliable options.